The present invention relates to a method of manufacturing a semiconductor device and a semiconductor device, in particular, to a technology effective when applied to a semiconductor device having a nonvolatile memory and a field effect transistor.
In recent years, with the scaling down of semiconductor devices, a low breakdown voltage MOSFET used in a logic circuit or the like and operated at a high speed and a flash memory which is a nonvolatile memory device has been formed on the same semiconductor substrate. As the procedure of a step of forming such a semiconductor device, there is known a method of forming a gate structure of a flash memory and then introducing an impurity into a gate electrode of a low breakdown voltage MOSFET.
Patent Document 1 (Japanese Patent Laid-Open No. 2007-305711) describes a semiconductor device obtained by forming a control gate electrode of a MONOS (metal oxide nitride oxide semiconductor) type nonvolatile memory and gate electrodes of other MOSFETS such as high breakdown voltage MOSFET so as to have a structure in which two polysilicon film layers have been stacked one after another.
Patent Document 2 (Japanese Patent Laid-Open No. 2001-244424) describes a semiconductor device obtained by forming a floating gate electrode of a nonvolatile memory, a gate electrode of a high breakdown voltage MOSFET, and a gate electrode of a low breakdown voltage MOSFET by stacking two polysilicon film layers one after another.
Patent Document 3 (Japanese Patent Laid-Open No. 2000-040752) describes a semiconductor device obtained by forming a floating gate electrode of a nonvolatile memory by stacking two polysilicon film layers one after another.